Multiport/2 or X.25
@eff0.adf IBM Realtime Interface Co-processor Multiport/2 or X.25 /2 Adapter 
Options  Realtime Interface Co-Processor Multiport/2 and X.25 Options Diskette
C Support Realtime Interface Co-Processor C Language Support
204 IBM Realtime Co-Processor Microcode V2.04 (DOS)
204 IBM Realtime Co-Processor Microcode V2.04 (OS/2)
153 IBM Realtime Control Microcode V1.53

Finally! Radisys has images of the various daughtercards!
Multiport 8 port 232 & Multiport/2 8 Port Cable 
Multiport 8 port 232 & Multiport/2 8 Port Direct Modem Attach Cable 



Multiport/2 Base Card PN 16F2200
A Intel A80186
B, D Zilog Z0803606VSC Z-CIO
C, E Zilog Z0803008VSC Z-SCC
CR LED
F 09F1877ESD SSIC
JP1 Jumper Pack
K1, K2 60 pin socket
SIP1 Dual socket for 30 pin SIMM
U8 BIOS 16F2201
U9 BIOS 16F2203
Y1 14.7456 MHz Osc
Y2 25.0 MHz Osc
   Sorry, but the alpha IDs are made up. I can't see any markings by the chips....


RS-232 Interface Card ?
K1B, K2B 60 Pin Header
P1 78 pin female Port
U1, U2 Zilog Z80C3008PSC
Note- K1B is the outermost header.

If you can tell me what this interface card is... It cane on a Multiport/2 with 512K.
 
 
 
 


8 Port RS-232-D EIB

K0 30 pin header
K1, K2 60 pin dual header
P1 ?? pin port
U1-U2 SCN26562C4A52
U37 33F5251 3333FF">U37 33F5251
 

Once again, please tell me what this is!
 
 
 
 



30 Pin SIMMS
  My sneaky suspicion- these are the same rare chips used by the SCSI w/cache
   512K- Mitsubishi MH25609BJ-12
   1MB- IBM 37F2016D   50F8938

LED Indicator
   A light-emitting diode (LED) indicator provides a visual status of the watchdog timer status and error status. The LED turns on when the watchdog timer expires or a hardware error is detected by microcode on the co-processor adapter. The LED also turns on when power is applied initially to the &cop.; it turns off after a successful power-on self-test (POST). 

Co-processor adapter PROM
Two 27C256 chips (200-nS access time) provide the 64KB of co-processor adapter PROM. 

8030 Serial Communications Controllers (SSC)
   The primary function of the four SCCs is to provide controller logic for eight independent serial communications ports. 
   After initial configuring of the 8030s by the Realtime Control Microcode, a major portion of the serial communications workload is relieved from the 80186 processor and is performed by the 8030s

8036 Counter/Timer and Parallel I/O Unit (CIO)
   The CIO provides peripheral I/O support through an integrated chip containing three independent 16-bit counters or timers, two independent 8-bit double-buffered I/O ports, and a special purpose 4-bit I/O port. 

One timer and the 4-bit I/O port are used by the on-board watchdog timer to provide interrupt notification of a run-away CPU or a run-away operation. 

Two timers and two ports are used in peripheral I/O control of data through the co-processor adapter's electrical interface boards. 

The Realtime Control Microcode is the on-board multitasking supervisory control program (Task 0) for the co-processor adapter. The program can be found on the
Realtime Interface Co-Processor Diagnostics and Realtime Control Microcode diskette that came with your co-processor adapter. 

Realtime Control Microcode (RCM)
   The RCM supports the co-processor adapters through two versions. Version 1.x is named ICAAIM.COM. It provides support for the Realtime Interface Co-processor Adapter, the Multiport Adapter, and the Multiport/2 Adapter. Version 2.x is named ICARCM.COM. It provides support for the Portmaster Adapter/A and the Multiport Adapter, Model 2. 

Watchdog Timer
   A watchdog timer has been incorporated on the co-processor adapter card. This timer, once activated, must continually be strobed by software so that it will not time out. If the 80C186 processor ever has a fatal error, this timer will reach its terminal count. The terminal count will: 
activate an LED indicator on the co-processor adapter card 
   One timer and one 4-bit I/O port are used by the on-board watchdog timer to provide interrupt notification of a runaway CPU. 

Shared Storage Interface Chip
The SSIC provides a convenient and flexible way of passing data and control bytes between the 80186 bus and the system unit bus. This is accomplished through an IBM CMOS gate array called the Shared Storage Interface Chip, an array of 10,000 gates. The chip adapts to both 8-bit and 16-bit data buses on the system unit bus. The VLSI gate array's basic purpose is to provide a high performance interface between the co-processor adapter and the system unit. All data communications between the system unit and the co-processor adapter are done through this interface. This is accomplished through the following functions performed by the Shared Storage Interface Chip. 

Direct Memory Access
   The co-processor adapter card has 16 DMA channels dedicated to the transmit and the receive function of each of eight ports. In addition, two DMA channels are
assigned to on-card memory-to-memory transfers. 



Applications and Information about ARTIC cards

Quadron Corporation
QUADRON ARTIC SOFTWARE

Synchronous Communications
Flow Control
ARTIC Installation Worksheets 
Memory Map to Assist in Shared Window Location 
Interrupt Level Selection 
Port Configurations, Modem Status & Pin Outs
General Purpose ARTIC Cable 
 
 


9595 Main Page