63 vs. 83 MHz POD
Difference Btween Socket
4, 5, and 7 (From PowerLeap)
Metal Capped Chips
Evergreen 133 Interposer
496 vs. 497 Cache controller
ODP in ODPR Socket?
Dr. Dobb's Microprocessor Resources
(takes you from my site)
(and Pentium MMX) Documentation 496/497/498 Cache controller,
Documentation Used on SCSI w/cache, Fast/Wide....
(CPU and NPX list)
83MHz POD vs. 63MHz
> How far can the 83MHz POD be pushed? What is the highest practical
clock speed that won't make one spin so fast, it churns itself into butter?
It runs fine at 40MHZ. ( 2.5 X 40 = 100MHZ ). Benchmarks
are VERY impressive at this level also. If you figure out a way to get
the Lacuna to 40MHZ, please let me know.
I dunno about the 83, but I'm running a 63 at 83.
In a Lacuna. With no interposer. Rock stable, and barely gets
Most likely the two chips are made from identical cores ...
The 83 is intended to run in 33MHz systems with internal
2.5x clocking. The 63 is to be used in 25MHz systems also with 2.5x clocking
... but the chips are most likely made from one wafer and only labelled
differently. It were a waste and inefficient to make two (technically identical)
"low end" chips / upgrades with two different masking- and selection-processes.
The good old Intel marketing gag to sell "higher rated"
processors at higher prices.
I found the PODP5V63 already stable enough to run at 33MHz
when I upgraded customers machines back in '94 (PS/VP-2) and we temporarily
ran out of 83-versions. I think they have been used with the 63-types until
the end (about 2 or 3 years).
Metal Capped Chips
>That complex run DX4 chips fine. At any rate with any CPUs I'm
bit nervous about those aluminum ESD cans running HOT than I'm used to
on other "warm ~ hot" chipsets in peecees. Know of vendor selling
doublesided thermal conductive stickers? I have lot of heatsinks
collected when fans failed.
Err ... no need to worry. These ESD-capped chips are pretty
rigid. They are in fact ceramic under this aluminium shield and have been
designed for temperatures *far* over what's normal in "generica" PCs. I
think they are spec'd for 75°C and above - that's so hot you cannot
touch them with bare fingers. They have been (originally) designed for
the use in mainframes and minis. :-)
OD Use top pins if only one
socket on board - even if marked “OverDrive Ready”. If installed in an
OverDrive socket, use bottom two pins.
CB Solder pads for 4 pin header.
Where present, The top two pins are labled "WT" and the bottom two "CB"
- Write Through and Cache Back
Clock Jumper The 4X/2X selects
quadrupling mode, 3X selects tripling mode.
BLK/RED I think this is a socket
to supply 5v to a CPU fan.
496 vs. 497 Cache
From Dr. Jim Shorney
Overdrive processors are not compatible with the '496
cache controller on the P60/66 complexes. However...
I swapped out the '496 cache controller
on mine for a borrowed '497 (well heatsinked) and was able to boot
DOS with a POD 133 on my P60 (overclocked to 66). It wasn't entirely
stable, and would not boot OS/2 Warp 4.0 or NT 4.0. The Powerleap
PL54C interposer was still dead in this configuration. There may
yet be hope, I haven't tried the Powerleap with anything other than an
Intel 166 yet, and I may also downclock the complex back to 60 MHz and
see what happens. There may yet be hope...
The '497 reportedly has a 3.3v core,
but it seemed to run stable and reliable for several hours with the stock
P60 CPU in my system in place of the 5v '496.
I briefly looked over the docs this afternoon (712 pages,
wow...). Seems the '497 is still a 5v part, it is the I/O buffers that
connect to the CPU that are 3.3v. This probably explains in part
why the chip doesn't self-destruct in the '496 socket. It also seems
to invalidate the need for an interposer, since the P60/66 I/O is 5v anyway
and the buffers would have to run at 5v to interface at all with the CPU.
This brings up the question of noise immunity, though - will circuits designed
to run at 3.3v logic levels be more or less sensitive to noise or poor
signal quality when run at 5v? Inquiring minds want to know.
From Tony Ingenoso
I suspect noise is going to be less of a problem at higher
voltages Jim. In theory, the voltage range for correct operation
would be wider(particularly for CMOS). The only reason I ever saw
(other than laptop applications) for the drive to lower voltages was to
limit heat as the gate counts and frequencies went up.
CMOS parts like high voltages -- you can crank clock speeds
faster with higher voltages(the standard overclockers trick). Discrete
type CMOS parts can often be run as high as 20V and work fine. The
downside is that its power characteristics start approaching those of TTL
at the higher speeds (and heat goes up). If the only nominally 3.3V
sections of the cache controller are the line drivers/buffers, there's
probably not going to be enough stuff getting overvoltaged to make any
significant difference in the power draw.
>Can I upgrade the 9577 to 586 using the Kingston TurboChip using the
spare (overdrive ?) cpu socket on the board.
Only if you got one of the older Kingston Turbochips that have
a 486/487 jumper at the underside. The socket in the -0UA is an "upgrade
socket" only. The 486SX-33 is soldered on the planar and is disabled when
using a 487SX or 486SX Overdrive - not when using a 486DX, which lacks
the "disable present cpu" pin.
ODP (487) in ODPR
From Jim Shorney
>I drilled a small hole in a 168-pin 486 socket at the 169th pin position
so I could plug an ODP in. IIRC, it was a type 1 non-SOD that I did
that to. The extra pin is the SX disable pin. I've also used
a 487 on a do-every-CPU-made clone board.
Okay - that's using the -OPD in an "-OPDR place". But what if
you got an -OPDR and needed a "487SX-style" -OPD ? I would guess that it
should to to tie the 169th pin to GND with a small piece of wire (and a
resistor of 1 - 4.7 K probably to avoid potential damage).
Sort of using a 486DX for a 487SX ....
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