Type 3 Complex
Reference and Diagnostic Disks
Memory supported, cache, features
Support for >1GB Disks as IML
False ARTIC Diag Error
Type 3 Evergreen cpu upgrade that worked
"M"/ Upgrade 486DX 50 MHz 57F1597
Disk for Type 3-
for Type 3 (Common to all complexes)
Min/Max on system board: 8/64MB (parity or ECC same limits)
PS/2 72-pin SIMM, (ECC or Parity) Interleaved SIMMs ONLY.
The PS/2 Enhanced 486/50 Processor Upgrade Option supports
a maximum of 64MB of ECC or parity memory, addressable by DMA. The
PS/2 Enhanced 486/50 Processor Upgrade Option supports 1MB and 2MB 85ns
memory, 2MB, 4MB and 8MB 80ns memory and 4MB and 8MB ECC 70ns memory.
The memory SIMMs must be installed in matched pairs (speed, size and type).
Cache: 8kb L1, 256kb L2 cache
* 40 MB per second streaming
data transfer support.
* Error Checking and Correcting (ECC)
* 256KB Level 2 memory cache (write-through) is standard.
* 20 MHz DMA; 32 bit DMA directly addresses all memory; DMA supports
Subsystem Control Block.
* Faster bus arbitration (than Base 1) for busmaster performance.
* Enhanced Dual Path Memory
* Subsystem Control Block
* Vital Product Data
* Synchronous Channel Check
* Data bus parity support
* A logging facility is provided (for ECC or system errors).
>1GB Drives as IML
The M complex supports >1GB drives as the IML source.
No complex BIOS upgrade is needed (or available). However, the SCSI controller
needs the enhanced SCSI BIOS of 92F2244 / 92F2245 to IML properly.
False ARTIC diag
SYMPTOM: When running diagnostics on the ARTIC Portmaster
Adapter/A in an 8590 or 8595 with the 486/50MHZ processor card installed,
a false 14220, E0DE error may occur.
PROBLEM ISOLATION AIDS: Check the date of the Portmaster
Adapter/A diagnostic file (DEV141.DGS) on the system reference diskette.
Files dated 1-31-90 or earlier will exhibit the symptom.
FIX: Download updated Portmaster Adapter/A option
"M"/ Upgrade 486DX
50 MHz 57F1597 FCC ID ANOIBM486B50
Sticker on Base card is 71G6207, on daughtercard 71G6190. Both
cards are silkscreened with "57F1597".
|OS1 50 MHz
U4, U5, U7-U12
U14, U15, U17
TI SN74BCT 2160-12FM
U13, U18 L2
U4, U5, U7-U12
Why DX50 is on
The DX50 *always* sits on the second card stacked on the
base-card with the MCA-connector. This is caused by the odd Intel
cache chipset, which has a limitation on the distance it can be installed
away from the CPU ... And while there was not enough room to stuff everything
on one single printboard the cpu and cache sit in the "upper floor".
DX50 Base Board
Solder pads for 25 pin header
MHz MCA Bus clock
MHz Osc- Dunno.
U1, U22 Voltage
Memory Data Buffer
Memory Addr. Buffer
41G9251 BIOS. Mitsubishi variant
of the 27C201, (256K x 8-bit.)
OS1 VR for the base card?
OS2 VR for the daughtercard?
is this? It's on all later complexes.
J1 Earlier versions had a
double pin-row connector at that place ... intended for the (or: one) precessor
of the Systems Management Adapter used on "high availability network servers".
The 50-MHz Type 3 processor board in a 90/95 (submodel
code 28 and 29), has two LEDs; one in position CR1, and one in CR2. During
POST, CR1 should come on momentarily and CR2 should stay off. If the LEDs
work any other way, suspect that the processor board is defective.
Use the LEDs to help differentiate between a processor
board or a system board failure. If you are instructed to replace one of
the boards, and the problem still exists, replace the other board (also
reinstall the first board). (Ed. Reports
coming in make me wonder about any of this. If the board passes diagnostics,
and works normally, do you really care about the LEDs?)
> I was all set to install a power stacker 133/586 on my dx50 in the
9595-omt. I for some reason decided to RTFM while having a cuppa. they
say the powerstacker will not work with dx50. what cpu can I use to juice
up the dx50.?
Pay no attention to the manual. Set the multiplier
to x3, the cache jumper (if present) to write-through, and plug it in.
It will probably work fine.
Complex Main Page
9595 Main Page